/* dbug12.h -- C definitions for D-Bug12 V4.x.x
 * Version 2.0  March 1, 2004 -- Uses #define instead of typedef
 * Reference:
 * Doughman, Gordon. "Reference Guide For D-Bug12 Version 4.x.x",
 * April 5, 2002, Motorola Inc.
 *
 */

#ifndef _DBUG12_H
#define _DBUG12_H

/* RAM interrupt vector table
 * If the address of the user interrupt service routine
 * is written to the corresponding entry in the table,
 * D-Bug12 will use it instead of its own built-in vector.
 * Ref. Doughman, section 4.2
 */
typedef char *Address;

/* Must also define _ramvectors as 0x3e00 in file memory.x
 * PROVIDE (_ramvectors = 0x3e00);
 */

/* Interrupt vector numbers
 * Ref: 
 * Doughman, Section 4.2, p.11 and Appendix C., p.86
 * See also Section 5.2 MC9S12DP256B Device User Guide, V02.14, 2003, Motorola Inc. 
 */
#define UserRsrv0x80 0 /* $3E00 Reserved $FF80 */
#define UserRsrv0x82 1 /* $3E02 Reserved $FF82 */
#define UserRsrv0x84 2 /* $3E04 Reserved $FF84 */
#define UserRsrv0x86 3 /* $3E06 Reserved $FF86 */
#define UserRsrv0x88 4 /* $3E08 Reserved $FF88 */
#define UserRsrv0x8a 5 /* $3E0A Reserved $FF8A */
#define UserPWMShDn 6 /* $3E0C PWM Emergency Shutdown */
#define UserPortP 7 /* $3E0E Port P Interrupt */
#define UserMSCAN4Tx 8 /* $3E10 MSCAN 4 Transmit */
#define UserMSCAN4Rx 9 /* $3E12 MSCAN 4 Receive */
#define UserMSCAN4Errs 10 /* $3E14 MSCAN 4 Errors */
#define UserMSCAN4Wake 11 /* $3E16 MSCAN 4 Wake-up */
#define UserMSCAN3Tx 12 /* $3E18 MSCAN 3 Transmit */
#define UserMSCAN3Rx 13 /* $3E1A MSCAN 3 Receive */
#define UserMSCAN3Errs 14 /* $3E1C MSCAN 3 Errors */
#define UserMSCAN3Wake 15 /* $3E1E MSCAN 3 Wake-up */
#define UserMSCAN2Tx 16 /* $3E20 MSCAN 2 Transmit */
#define UserMSCAN2Rx 17 /* $3E22 MSCAN 2 Receive */
#define UserMSCAN2Errs 18 /* $3E24 MSCAN 2 Errors */
#define UserMSCAN2Wake 19 /* $3E26 MSCAN 2 Wake-up */
#define UserMSCAN1Tx 20 /* $3E28 MSCAN 1 Transmit */
#define UserMSCAN1Rx 21 /* $3E2A MSCAN 1 Receive */
#define UserMSCAN1Errs 22 /* $3E2C MSCAN 1 Errors */
#define UserMSCAN1Wake 23 /* $3E2E MSCAN 1 Wake-up */
#define UserMSCAN0Tx 24 /* $3E30 MSCAN 0 Transmit */
#define UserMSCAN0Rx 25 /* $3E32 MSCAN 0 Receive */
#define UserMSCAN0Errs 26 /* $3E34 MSCAN 0 Errors */
#define UserMSCAN0Wake 27 /* $3E36 MSCAN 0 Wake-up */
#define UserFlash 28 /* $3E38 Flash */
#define UserEEPROM 29 /* $3E3A EEPROM */
#define UserSPI2 30 /* $3E3C SPI2 */
#define UserSPI1 31 /* $3E3E SPI1 */
#define UserIIC 32 /* $3E40 IIC Bus */
#define UserDLC 33 /* $3E42 DLC */
#define UserSCME 34 /* $3E44 SCME */
#define UserCRG 35 /* $3E46 CRG Lock */
#define UserPAccBOv 36 /* $3E48 Pulse Accumulator B Overflow */
#define UserModDwnCtr 37 /* $3E4A Modulus Down Counter Underflow */
#define UserPortH 38 /* $3E4C Port H Interrupt */
#define UserPortJ 39 /* $3E4E Port J Interrupt */
#define UserAtoD1 40 /* $3E50 ATD1 */
#define UserAtoD0 41 /* $3E52 ATD0 */
#define UserSCI1 42 /* $3E54 SCI1 */
#define UserSCI0 43 /* $3E56 SCI0 */
#define UserSPI0 44 /* $3E58 SPI0 */
#define UserPAccEdge 45 /* $3E5A Pulse Accumulator A Input Edge */
#define UserPAccOvf 46 /* $3E5C Pulse Accumulator A Overflow */
#define UserTimerOvf 47 /* $3E5E Timer Overflow */
#define UserTimerCh7 48 /* $3E60 Timer Channel 7 */
#define UserTimerCh6 49 /* $3E62 Timer Channel 6 */
#define UserTimerCh5 50 /* $3E64 Timer Channel 5 */
#define UserTimerCh4 51 /* $3E66 Timer Channel 4 */
#define UserTimerCh3 52 /* $3E68 Timer Channel 3 */
#define UserTimerCh2 53 /* $3E6A Timer Channel 2 */
#define UserTimerCh1 54 /* $3E6C Timer Channel 1 */
#define UserTimerCh0 55 /* $3E6E Timer Channel 0 */
#define UserRTI 56  /* $3E70 Real Time Interrupt */
#define UserIRQ 57 /* $3E72 IRQ */
#define UserXIRQ 58 /* $3E74 XIRQ */
#define UserSWI 59 /* $3E76 SWI */
#define UserTrap 60 /* $3E78 Unimplemented Instruction Trap */

#endif

/*
 * end D-Bug12 definitions
 */
